1. Field of the Invention
The invention relates to a surge protection device for protecting communication equipment against surge noise generated by lightning, particularly to the construction of a surge protection device employing a semiconductor and a method of fabricating the same.
2. Description of the Related Art
A surge protection device is generally used for protecting electronic devices against noise. However, the invention relates to a surge protection device for protecting various communication equipment against surge noise generated by lightening, particularly to a surge protection device employing a semiconductor.
At first, it is described what is "surge" used in this specification. Generally, "surge" has same meaning as "undulation" or "swelling". That is, surge noise corresponds to noise wherein a voltage or a current varies periodically over time.
There are two kinds of surge noise which are generated by lightning. One kind is surge noise which is caused by the input of noise into a signal line when lightning strikes directly, and the other is surge noise which is caused by the mixing of a surge into a signal line when it is generated by electromagnetic induction (induction lightning) at the instant when lightning strikes at a remote place, wherein the former surge noise has a high voltage while the latter surge noise has a relatively low voltage, i.e., several hundred volts at a peak voltage value.
As a protection device for protecting against surge noise induced by an induction lightening, there are several types using ceramics, or using a dielectric or utilizing the switching of a semiconductor PN junction.
Particularly, since a semiconductor PN-junction switching is excellent in characteristics compared with a device utilizing ceramics or a dielectric, these devices have recently been replaced by the semiconductor PN-junction switching.
As switches utilizing the semiconductor PN junction, there is a thyristor having three junctions of pnpn. As phenomena serving as a trigger whereby a switch changes from OFF to ON, there are an avalanche breakdown phenomenon of a PN junction and a punch-through phenomenon which occurs in the case of two junctions of pnp or npn.
At the junction surfaces of a PN junction, there is a region where electrons or holes are repelled and a fixed charge alone remains, which is a so-called depletion layer (space charge region). The depletion layer is reduced until it becomes a fixed width when a positive or plus voltage is applied to a p-type region and a negative or minus voltage is applied to an n-type region (forward voltage is applied).
When the minus voltage is applied to a p-type region and the plus voltage is applied to an n-type region (reverse voltage is applied), the depletion layer is widened to a fixed width whereby the PN junction is broken.
Assuming that there is an NPN junction and a voltage is applied to an n-type region at one side, a depletion layer is widened from two junctions at a middle p-type region. When the depletion layers are joined with each other, it is considered the same as a case where the n-type regions at both sides are connected to each other by way of a resistance layer. This is the so-called punch-through phenomenon.
The surge protection device which is the subject of this invention utilizes this punch-through phenomenon as a trigger by which the pnpn thyristor is switched ON. There are two types of surge protection devices, one is a directional device which operates only at one side and a bidirectional device which operates at both sides thereof The surge protection device of the invention solves the problems of the bidirectional device.
Described hereinafter is the construction of a conventional bidirectional surge protection device and a method of fabricating the same, and the principle of operation.
The construction of the conventional bidirectional surge protection device will be first described with reference to the sectional view of FIG. 30.
As shown in FIG. 30, device regions 33, 33 are provided on both surfaces, namely, a front surface 4 and a back surface 6 of a semiconductor substrate 2. Base layers 20 are selectively formed on the device regions 33 for determining a voltage at which the device becomes ON. Emitter layers 18 are formed on the upper portions alone of the base layers 20 so as to determine the width of the base layers 20 and to inject minority carriers into the base layers 20 after the device becomes ON.
The mere formation of the base layers 20 and the emitter layers 18 produces stage portions of diffusion layers at the end portions of the base layers 20 when forming the emitter layers 18 by diffusing them. This is referred to as an "emitter-push".
Electric field is concentrated at these portions where the operation of the device is not uniformly performed over the entire surface of the base layers 20. Accordingly, there are provided emitter-push restraining layers 16 on both sides of the base layers 20 and emitter layers 18, wherein the emitter-push restraining layers 16 are higher in impurity concentration than the base layers 20 and they have the same conduction type as the base layers 20, and whereby the stage portions of the diffusion layers where the electric field is concentrated are removed.
The base layers 20, the emitter layers 18 and the emitter-push restraining layers 16 are collectively referred to as the device regions 33.
Further, there are provided electric field relaxation layers 42 on both surfaces of the semiconductor substrate 2 which surround the peripheries of the device regions 33 to maintain a sufficient withstand voltage so as to avoid break down in a lateral direction. LOCOS (local oxidation of silicon) films 14 are selectively formed on both surfaces of the semiconductor substrate 2 to separate the device regions 33 from other regions, while PSG films 24 as interlayer insulators are formed on the LOCOS films 14 provided on both surfaces of the semiconductor substrate 2 to reduce the influence of the electric field to be applied to end portions of the metallic electrodes.
Contact holes 26, 26 are formed at both surfaces of the semiconductor substrate 2 for securing connection between the metallic electrodes and the device regions 33, and a front metal electrode 28 and a back metal electrode 30 are respectively provided on the contact holes 26, 26.
Passivation films 34, for protecting the device against the external environment and for securing reliability, are formed on the front metal electrode 28 and the back metal electrode 30 provided on both surfaces of the semiconductor substrate 2, and on the device regions 33, 33 provided on both surfaces of the semiconductor substrate 2, opening portions 36 of passivation film 34 are formed considering the subsequent mounting thereof.
A method of fabricating the conventional bidirectional surge protection device will be now described. Each step of fabricating the surge protection device will be described with reference to sectional views shown in FIGS. 24 to 30. Conditions in the method of fabricating the surge protection device are explained with reference to the case for manufacturing a surge protection device which operates at 240 V
First, as shown in FIG. 24, pad oxidation films 8 are formed on both surfaces of the front surface 4 and the back surface 6 of the semiconductor substrate 2 in a thickness of 40 nm for relaxing the stress when forming the LOCOS films 14, and silicon nitride films 10 used for forming the LOCOS films serving as films for impeding the formation of the LOCOS films are formed on the upper layers of the pad oxidation films 8 in a thickness of 150 nm are provided on both surfaces of the semiconductor substrate 2.
Photoresists 50, which become masks for etching the silicon nitride films 10 forming LOCOS films, are subject to patterning by a photolithography process on both surfaces of the semiconductor substrate 2 so that the silicon nitride films 10 forming LOCOS films are subject to patterning by dry etching as shown in FIG. 24. Thereafter, the photoresists 50 are removed.
Next, as shown in FIG. 25, photoresists 51, which become masks when implanting ions therein, are subject to patterning on both surfaces of the semiconductor substrate 2 by a photolithography process, then boron which is a p-type impurity is implanted in both surfaces of the semiconductor substrate 2 at a dose of 1.0.times.10.sup.15 atoms/cm.sup.2 with 30 KeV energy. Thereafter, the photoresists 51 are removed.
The regions in which the p-type impurity is implanted become emitter-push restraining layers 16 which are necessary for avoiding electric field concentration at end portions of base layers and emitter layers, formed later.
Further, the pad oxidation films 8 are selectively oxidized at 1140.degree. C., with a flow rate of O.sub.2 /N.sub.2 =0.06/9.0 liters/min, for 440 minutes while the silicon nitride films 10 forming LOCOS films shown in FIG. 25 serve as oxidation prevention films, thereby forming the LOCOS films 14 in a thickness of 500 nm. At the same time when LOCOS films 14 are formed, the emitter-push restraining layers 16 and the electric field relaxation layers 42 are formed by a drive-in process.
The electric field relaxation layers 42 are formed to surround the peripheries of the device regions to provide sufficient withstand voltage so as to avoid break down in the lateral direction. Thereafter, the silicon nitride films 10 forming LOCOS films are removed.
Thereafter, boron which is a p-type impurity is implanted in both surfaces of the semiconductor substrate 2 at a dose of 7.0.times.10.sup.12 atoms/cm.sup.2 with 60 KeV energy while the LOCOS films 14 serve as ion implantation masks.
Thereafter, the drive-in is performed at 1140.degree. C. for 30 hours in a nitrogen atmosphere, thereby forming the base layers 20 as shown in FIG. 27. The base layers 20 determine the operation voltage when the depletion layers are widened when the device operates.
Subsequently, phosphorus which is an n-type conduction impurity is implanted in both surfaces of the semiconductor substrate 2 at a dose of 5.times.10.sup.15 atoms/cm.sup.2 with 80 KeV energy. The drive-in is performed at 1100.degree. C., with a flow rate of O.sub.2 /N.sub.2 =0.45/8.55 liters/min. for 110 minutes, thereby forming emitter layers 18 as shown in FIG. 28.
The emitter layers 18 are formed on the base layers 20 for determining each width of the base layers 20 for determining an operation voltage and for serving as a path through which a current flows by implanting minority carriers in the base layers 20 when the device is ON.
Thereafter, phosphine silicate glass films (PSG films) 24 are formed on both surfaces of the semiconductor substrate 2 in a thickness of 500 nm at 460.degree. C. for 1 minute as shown in FIG. 29 using a mixed gas of phosphine (PH.sub.3) and monosilane (SiH.sub.4) by a thermal-chemical vapor deposition (CVD) process.
The PSG films 24 are formed to relax the influence of the electric field applied to the surfaces between the semiconductor substrate 2 and the LOCOS films 14 at the end portions of the metal electrodes formed later.
Subsequently, as shown in FIG. 29, photoresists 52, which become etching masks, are subject to patterning on both surfaces of the semiconductor substrate 2 by a photolithography process, then the LOCOS films 14 and the PSG films 24 are etched by wet etching to form the contact holes 26. Thereafter, the photoresists 52 are removed.
Next, as shown in FIG. 30, the front metal electrode 28 is formed on the front surface 4 of the semiconductor substrate 2 in a thickness of 1000 nm by the sputtering and patterning while the back metal electrode 30 is formed on the back surface 6 of the semiconductor substrate 2 in a thickness of 1000 nm by the sputtering and patterning, then sintering is performed at 380.degree. C. in a hydrogen atmosphere for 60 minutes.
Then, the silicon nitride films are formed on both surfaces of the semiconductor substrate 2 as the passivation films 34 in a thickness of 800 nm by a plasma CVD process, and thereafter photoresists which become etching masks are subject to patterning by a photolithography process to define the openings 36 in the passivation films 34 by dry etching.
In such a manner, a bidirectional surge protection device is completed as shown in FIG. 30.
Next, the operation principle of the surge protection device will be described with reference to FIGS. 31 and 32.
For explaining the example of the operation principle, the conduction types of the constituents of the semiconductor of the surge protection device shown in FIG. 30 are n-type in semiconductor substrate 2, p-type in the emitter-push restraining layers 16 and the electric field relaxation layers 42, which are higher in impurity concentration than the base layers 20, and n-type emitter layers 18, which are higher in impurity concentration than the semiconductor substrate 2, and p-type in the base layers 20.
First as shown in FIG. 31, a front metal electrode 28 of the front surface 4 is grounded and the plus voltage is applied to the back metal electrode 30 from a power supply 60. As a result, the PN junction between the base layers 20 on the front surface 4 and the semiconductor substrate 2 is reversely biased so that the depletion layer 38 stretches within the base layers 20 and to the semiconductor substrate 2.
At this time, current scarcely flows between the front metal electrode 28 of the front surface 4 and the back metal electrode 30 of the back surface 6. At this time, the electric field relaxation layers 42 relax the electric field applied to the depletion layer 38 which laterally stretches so as to avoid break down at the PN junction in the lateral direction. In this state the device is OFF.
FIG. 32 shows an example of characteristics of a device which operates at 240 V.
If the plus voltage applied to the back metal electrode 30 shown in FIG. 31 increases, the depletion layer 38 within the base layers 20 further stretches to reach the emitter layers 18, so that a punch-through phenomenon occurs (a point denoted by a circle P in FIG. 32). Then, a current flows as if the emitter layers 18 and the semiconductor substrate 2 are connected to each other via a resistor.
The constituents of the current are holes 40 which are injected from the emitter-push restraining layers 16 of the back surface 6 and electrons 41 which are injected from the emitter layers 18 of the front surface 4 owing to the punch-through phenomenon.
The main current which is important until the device becomes ON after the occurrence of the punch-through phenomenon is a hole current. If the hole current starts to flow, a potential increases at the middle position 44 of the base layers 20 which are clamped between the emitter-push restraining layers 16.
If the potential increases to exceed a threshold value, the electrons 41 enter the emitter layers 18 at once since the emitter layers 18 and the base layers 20 are forwardly biased. A current value Ibo immediately before being ON is, for example, about 100 mA to 200 mA.
The device becomes ON when this phenomenon occurs. A voltage value Von at the time when the device is ON is, for example, about 2 V to 3 V.
A method of using the surge protection device is next described. Since the surge protection device serves as a bypath to escape noise which has entered a delicate communication line or electronic equipment, the surge protection devices are disposed in parallel with the communication line and the electronic equipment. The surge protection device becomes ON only at the time of entrance of surge noise having a voltage which is not tolerable to the communication line or the electronic equipment to allow the noise to escape thus protecting the communication line or the electronic equipment.
Accordingly, although it is important to remove the surge noise, it is also important to return the device to its original state after the surge noise is removed. If the device remains ON and does not immediately become OFF, a current flows from the communication line or the electronic equipment.
The surge protection device is set to become OFF at a current value which exceeds a normal current flowing through the communication line or the electronic equipment once the device is ON but within a scope which is tolerable to the equipment. The current at the time when the device is OFF is the so-called holding current.
It is desirable that the holding current is somewhat high. However, in the conventional bidirectional surge protection device, the holding current is lower than that of a directional surge protection device which is fabricated on one side in the same construction as shown in FIG. 30. The comparison of these devices' characteristics is explained with reference to FIG. 33.
Both the directional device and bidirectional device have substantially the same characteristics until they become ON wherein a punch-through phenomenon occurs, for example, at 240 V and they become ON when the current value Ib0 is about 100 mA to 200 mA.
Thereafter, while the devices are changed to OFF, the directional device D1 becomes OFF when the holding current is, for example, about 200 mA (Ih1) while the bidirectional device D2 is not changed to OFF unless the holding current is, for example, lowered to about 20 mA (Ih2).
The reason for this is explained with reference to FIG. 34. Conduction types of components of the semiconductor in FIG. 34 are n-type in a semiconductor substrate 2, p-type in emitter push restraining layers 16 having high impurity concentration, p-type in base layers 20, and n-type in emitter layers 18 having high impurity concentration.
Although already explained above in the operation principle, it is necessary that the potential at the middle position 44 within the base layers 20 increases for the device to become ON. If the device becomes OFF, it is considered that a reverse phenomenon occurs.
That is, even if the voltage of the surge noise is lowered, the potential at the middle position 44 remains if the holes 40 are much injected from the back surface 6. Accordingly, the device is not changed to OFF, whereby a current continuously flows even at a low voltage, and hence the holding current becomes small.
The reason why the holding current becomes small if the device is fabricated as a bidirectional device will be now be described with reference to the construction using an n-type semiconductor substrate.
If the directional device is changed to the bidirectional device while keeping the construction as it is, the device regions 33 which are covered with p-type layers (the emitter-push restraining layers 16 and the base layers 20 ) at the entire surfaces thereof are positioned at the back surface 6 as shown in FIG. 30. Accordingly, the surface area of the p-type layers becomes large, and the amount of the injection of the holes 40 from the back surface 6 (FIG. 34) becomes excessively large compared with the case of the directional device.
Under these circumstances, in the conventional bidirectional surge protection device, the holding current becomes small and a current is taken in from equipment which are connected in parallel with each other. This causes a problem in that it becomes the same as when the equipment is short-circuited thus rendering the operation of the equipment anomalous.